8155/6 Multifunction Device (memory+IO)

(Dated pre-2000)

Features:


Pinout (40 pins):

[Pinout]
AD0-AD7 I/O Addr/Data bus mux'd
RESET I Reset input
CE-bar or CE I Chip enable (55/56)
ALE I Address latch enable
RD-bar I Read input
WR-bar I Write input
IO/Mbar I I/O or memory section
PA0-7 I/O Port A (8 bit)
PB0-7 I/O Port B (8 bit)
PC0-5 I/O Port C (6 bit)
TIMER-IN I Timer input
TIMER-OUT-bar O Timer output

Block diagram:

[8155 block diagram]

Registers:

(ALE high, AD0=A0 etc)
A2A1A0Port
000Command/status reg.
001PA
010PB
011PC
100Timer LSB
101Timer MSB

Control word (command register) format:

D7D6D5D4D3D2D1D0
Timer commandIEBIEAPCPBPA
Port C bits (D2, D3):
ALTD3D2PC5PC4PC3PC2PC1PC0
100IIIIII
211OOOOOO
301OOOSTB-AbarBF-AINTR-A
410STB-BbarBF-BINtr-BSTB-Abar BF-AINTR-A
I - input O - output

Status register format:

D7D6D5D4D3D2D1D0
XTimerINTE-BBF-BINTR-BINTE-ABF-AINTR-A

D6: Timer. Latched high when TC is reached, low when status reg is read or reset is done.


Timer section

MSB:
M2M1T13T12T11T10T9T8
LSB:
T7T6T5T4T3T2T1T0

M2, M1: mode bits:

[Timing diagram: mode 0]

[Timing diagram: mode 1]

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